LL_TIM_Init and LL_TIM_DeInit APIs migration

The LL initialization and de-initialization functions previously available in the stm32tnxx_ll_tim.c files within HAL1 are no longer present in HAL2. In HAL2, all LL C files ( stm32tnxx_ll_tim.c) have been removed, leaving only the LL header files ( stm32tnxx_ll_tim.h) that contain static inline functions.

If users need to initialize or de-initialize TIM using the LL layer, they have two methods:

  • Utilize STM32CubeMX2 Code Generation: Rely on STM32CubeMX2 to generate code with the LL layer for TIM initialization and de-initialization.

  • Replace manually the initialization and de-initialization functionsReplace the LL_TIM_Init and LL_TIM_DeInit functions

    manually with equivalent sequences using the static inline functions provided in the stm32tnxx_ll_tim.h file, tailored to their specific configuration and requirements.

This approach ensures that the initialization and de-initialization sequences are precisely addressing the given use case based on the LL static inline functions provided in the stm32tnxx_ll_tim.h header file. The sequences offer improved footprint optimization compared to the previous LL initialization functions found in stm32tnxx_ll_tim.c.

Related concept: Remove stm32tnxx_ll_ppp.c files

Method 1: Utilize STM32CubeMX2 Code Generation

LL TIM configuration panel

Create a new project with the STM32CubeMX2, then start the initialization and the main configuration.

Project configuration panel

LL TIM main features configuration

Configure the TIM main features.

TIM main feature configuration

LL TIM channels configuration

Enable and configure the chosen TIM channel.

TIM channels configuration

LL TIM advanced features configuration

Configure the advanced TIM features.

TIM advanced feature configuration

LL TIM GPIO configuration

Configure GPIO pins.

TIM GPIO configuration

LL TIM DMA configuration

Configure the DMA for data reception as needed.

TIM DMA configuration

LL TIM NVIC configuration

Configure the NVIC in case of an interrupt.

TIM NVIC configuration

Generated TIM initialization and de-initialization sequences

The TIM initialization sequence is generated in the mx_tim1_init function in mx_tim1.c file under $YOUR_PROJECT_NAME$/$YOUR_PROJECT_NAME$_SW/generated/STM32Cube_CodeGen.

Related concepts:

Comparative Table for HAL1 and HAL2 initialization

Description

HAL1

HAL2

Example of a code snippet for initializing PWM using DMA 

static void MX_TIM1_Init(void)
{

  LL_TIM_InitTypeDef TIM_InitStruct = {0};
  LL_TIM_OC_InitTypeDef TIM_OC_InitStruct = {0};
  LL_TIM_BDTR_InitTypeDef TIM_BDTRInitStruct = {0};

  LL_DMA_InitTypeDef DMA_InitStruct = {0};
  LL_GPIO_InitTypeDef GPIO_InitStruct = {0};

  /* Peripheral clock enable */
  LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM1);

  /* TIM1 DMA Init */

  /* GPDMA1_REQUEST_TIM1_CH1 Init */
  DMA_InitStruct.SrcAddress = 0x00000000U;
  DMA_InitStruct.DestAddress = 0x00000000U;
  DMA_InitStruct.Direction = LL_DMA_DIRECTION_PERIPH_TO_MEMORY;
  DMA_InitStruct.BlkHWRequest = LL_DMA_HWREQUEST_SINGLEBURST;
  DMA_InitStruct.DataAlignment = LL_DMA_DATA_ALIGN_ZEROPADD;
  DMA_InitStruct.SrcBurstLength = 1;
  DMA_InitStruct.DestBurstLength = 1;
  DMA_InitStruct.SrcDataWidth = LL_DMA_SRC_DATAWIDTH_BYTE;
  DMA_InitStruct.DestDataWidth = LL_DMA_DEST_DATAWIDTH_BYTE;
  DMA_InitStruct.SrcIncMode = LL_DMA_SRC_FIXED;
  DMA_InitStruct.DestIncMode = LL_DMA_DEST_FIXED;
  DMA_InitStruct.Priority = LL_DMA_LOW_PRIORITY_LOW_WEIGHT;
  DMA_InitStruct.BlkDataLength = 0x00000000U;
  DMA_InitStruct.TriggerMode = LL_DMA_TRIGM_BLK_TRANSFER;
  DMA_InitStruct.TriggerPolarity = LL_DMA_TRIG_POLARITY_MASKED;
  DMA_InitStruct.TriggerSelection = 0x00000000U;
  DMA_InitStruct.Request = LL_GPDMA1_REQUEST_TIM1_CH1;
  DMA_InitStruct.TransferEventMode = LL_DMA_TCEM_BLK_TRANSFER;
  DMA_InitStruct.SrcAllocatedPort = LL_DMA_SRC_ALLOCATED_PORT0;
  DMA_InitStruct.DestAllocatedPort = LL_DMA_DEST_ALLOCATED_PORT0;
  DMA_InitStruct.LinkAllocatedPort = LL_DMA_LINK_ALLOCATED_PORT1;
  DMA_InitStruct.LinkStepMode = LL_DMA_LSM_FULL_EXECUTION;
  DMA_InitStruct.LinkedListBaseAddr = 0x00000000U;
  DMA_InitStruct.LinkedListAddrOffset = 0x00000000U;
  LL_DMA_Init(GPDMA1, LL_DMA_CHANNEL_1, &DMA_InitStruct);

  TIM_InitStruct.Prescaler = 0;
  TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
  TIM_InitStruct.Autoreload = 65535;
  TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
  TIM_InitStruct.RepetitionCounter = 0;
  LL_TIM_Init(TIM1, &TIM_InitStruct);
  LL_TIM_DisableARRPreload(TIM1);
  LL_TIM_OC_EnablePreload(TIM1, LL_TIM_CHANNEL_CH1);
  TIM_OC_InitStruct.OCMode = LL_TIM_OCMODE_PWM1;
  TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_DISABLE;
  TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_DISABLE;
  TIM_OC_InitStruct.CompareValue = 0;
  TIM_OC_InitStruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH;
  TIM_OC_InitStruct.OCNPolarity = LL_TIM_OCPOLARITY_HIGH;
  TIM_OC_InitStruct.OCIdleState = LL_TIM_OCIDLESTATE_LOW;
  TIM_OC_InitStruct.OCNIdleState = LL_TIM_OCIDLESTATE_LOW;
  LL_TIM_OC_Init(TIM1, LL_TIM_CHANNEL_CH1, &TIM_OC_InitStruct);
  LL_TIM_OC_DisableFast(TIM1, LL_TIM_CHANNEL_CH1);
  TIM_OC_InitStruct.OCMode = LL_TIM_OCMODE_FROZEN;
  LL_TIM_OC_Init(TIM1, LL_TIM_CHANNEL_CH5, &TIM_OC_InitStruct);
  LL_TIM_OC_DisableFast(TIM1, LL_TIM_CHANNEL_CH5);
  LL_TIM_SetTriggerOutput(TIM1, LL_TIM_TRGO_RESET);
  LL_TIM_SetTriggerOutput2(TIM1, LL_TIM_TRGO2_RESET);
  LL_TIM_DisableMasterSlaveMode(TIM1);
  TIM_BDTRInitStruct.OSSRState = LL_TIM_OSSR_DISABLE;
  TIM_BDTRInitStruct.OSSIState = LL_TIM_OSSI_DISABLE;
  TIM_BDTRInitStruct.LockLevel = LL_TIM_LOCKLEVEL_OFF;
  TIM_BDTRInitStruct.DeadTime = 0;
  TIM_BDTRInitStruct.BreakState = LL_TIM_BREAK_DISABLE;
  TIM_BDTRInitStruct.BreakPolarity = LL_TIM_BREAK_POLARITY_HIGH;
  TIM_BDTRInitStruct.BreakFilter = LL_TIM_BREAK_FILTER_FDIV1;
  TIM_BDTRInitStruct.BreakAFMode = LL_TIM_BREAK_AFMODE_INPUT;
  TIM_BDTRInitStruct.Break2State = LL_TIM_BREAK2_DISABLE;
  TIM_BDTRInitStruct.Break2Polarity = LL_TIM_BREAK2_POLARITY_HIGH;
  TIM_BDTRInitStruct.Break2Filter = LL_TIM_BREAK2_FILTER_FDIV1;
  TIM_BDTRInitStruct.Break2AFMode = LL_TIM_BREAK_AFMODE_INPUT;
  TIM_BDTRInitStruct.AutomaticOutput = LL_TIM_AUTOMATICOUTPUT_DISABLE;
  LL_TIM_BDTR_Init(TIM1, &TIM_BDTRInitStruct);
  LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
  /**TIM1 GPIO Configuration
  PA8   ------> TIM1_CH1
  */
  GPIO_InitStruct.Pin = LL_GPIO_PIN_8;
  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
  GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
  GPIO_InitStruct.Alternate = LL_GPIO_AF_1;
  LL_GPIO_Init(GPIOA, &GPIO_InitStruct);

}

TIM_TypeDef *mx_tim1_init(void)
{
  LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM1);

  /* Timer configuration to reach the output frequency at 2197 Hz */
  /* LL_TIM_SetPrescaler(TIM1, 0); */
  /* LL_TIM_SetCounterMode(TIM1, LL_TIM_COUNTERMODE_UP); */
  LL_TIM_SetAutoReload(TIM1, 65535);
  /* LL_TIM_SetClockDivision(TIM1, LL_TIM_CLOCKDIVISION_DIV1); */
  /* LL_TIM_SetClockDivision2(TIM1, LL_TIM_CLOCKDIVISION2_DIV1); */
  /* LL_TIM_SetClockSource(TIM1, LL_TIM_CLK_INTERNAL); */

  /* Channel 1 Configuration */
  /* LL_TIM_OC_ConfigOutput(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_OCPOLARITY_HIGH | LL_TIM_OCIDLESTATE_RESET); */
  /* LL_TIM_OC_SetOverrideState(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_OCOVERRIDE_RESET); */
  /* LL_TIM_OC_SetBreakMode(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_OCBREAKMODE_IMMEDIATE); */

  /* Compare Unit 1 Configuration */
  LL_TIM_OC_SetMode(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_OCMODE_PWM1);
  /* LL_TIM_OC_SetCompareValue(TIM1, LL_TIM_OC_COMPARE_UNIT_1, 0); */

  /* Update Event Management */
  /* LL_TIM_SetUpdateSource(TIM1, LL_TIM_UPDATESOURCE_REGULAR); */
  /* LL_TIM_EnableUpdateEvent(TIM1); */

  /* Capture/Compare DMA request selection */
  /* LL_TIM_CC_SetDMAReqTrigger(TIM1, LL_TIM_CCDMAREQUEST_CC); */

  /* Enable Timer Capture/Compare interrupt */
  NVIC_SetPriority(TIM1_CC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 0, 0));
  NVIC_EnableIRQ(TIM1_CC_IRQn);

  /* ################################################## TIM1_cc1 DMA configuration */
  /* Enable LPDMA1 clock */

  LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_LPDMA1);

  /* Configure DMA channel transfer request */
  LL_DMA_SetPeriphRequest(LPDMA1_CH0, LL_LPDMA1_REQUEST_TIM1_CC1);

  /* Configure DMA channel transfer direction */
  LL_DMA_SetDataTransferDirection(LPDMA1_CH0, LL_DMA_DIRECTION_PERIPH_TO_MEMORY);

  /* Configure DMA channel priority level */
  LL_DMA_SetChannelPriorityLevel(LPDMA1_CH0, LL_DMA_PRIORITY_LOW_WEIGHT_LOW);

  /* Configure DMA channel transfer register 1 */
  LL_DMA_ConfigTransfer(LPDMA1_CH0,
                        (LL_DMA_SRC_ADDR_FIXED | LL_DMA_SRC_DATA_WIDTH_WORD |
                        LL_DMA_DEST_ADDR_FIXED | LL_DMA_DEST_DATA_WIDTH_WORD));

  /* Enable the interruption for DMA */
  NVIC_SetPriority(LPDMA1_CH0_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 0, 0));
  NVIC_EnableIRQ(LPDMA1_CH0_IRQn);

  return TIM1;
}

Deinit sequence function 

void MX_TIM1_DeInit(void)
{
  if (LL_TIM_DeInit(TIM1) != HAL_OK)
  {
    Error_Handler();
  }
  LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM1);
  LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM1);
}

void mx_tim1_deinit(void)
{
  LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_TIM1);

  LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM1);
  LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM1);

  /* Disable Timer Capture/Compare interrupt */
  NVIC_DisableIRQ(TIM1_CC_IRQn);
  /* De-initialize the DMA channel */
  LL_DMA_DisableChannel(LPDMA1_CH0);
  LL_DMA_ClearFlag(LPDMA1_CH0, LL_DMA_FLAG_ALL);

  LL_DMA_WRITE_REG(LPDMA1_CH0, CCR, 0U);
  LL_DMA_WRITE_REG(LPDMA1_CH0, CTR1, 0U);
  LL_DMA_WRITE_REG(LPDMA1_CH0, CTR2, 0U);
  LL_DMA_WRITE_REG(LPDMA1_CH0, CBR1, 0U);
  LL_DMA_WRITE_REG(LPDMA1_CH0, CLLR, 0U);

  /* Disable the interruption for DMA */
  NVIC_DisableIRQ(LPDMA1_CH0_IRQn);
}

Method 2: Replace manually the initialization and de-initialization functions

LL_TIM_Init() API migration

According to the use-case, implement the precise sequence call based on the LL static inline functions provided in the stm32tnxx_ll_tim.h header file.

Functionality

HAL1

HAL2

In LL1, similar to HAL1, each process has its own initialization function. To initialize any functionalities of the Timer (TIM) peripheral, you need to call specific functions tailored to each functionality.

In LL2, unlike LL1, initialization is simplified with Suitable configuration sequence.

HAL1

HAL2

Case of TIM_timebase configuration 

/* To fill the fields of the TIMx timebase there are two ways*/
LL_TIM_InitTypeDef TIM_InitStruct;

/*The first method*/
/* Set the default configuration */
LL_TIM_StructInit(&TIM_InitStruct);

 /*Or*/

/*The second method*/
/* Set the selected configuration */
TIM_InitStruct->Prescaler         = (uint16_t)0x0000;
TIM_InitStruct->CounterMode       = LL_TIM_COUNTERMODE_UP;
TIM_InitStruct->Autoreload        = 0xFFFFFFFFU;
TIM_InitStruct->ClockDivision     = LL_TIM_CLOCKDIVISION_DIV1;
TIM_InitStruct->RepetitionCounter = 0x00000000U;

LL_TIM_Init(TIM1, &TIM_InitStruct);

  /*  Basic configuration.*/
  /* Set the auto-reload value*/
  LL_TIM_SetAutoReload(TIM1, 0xFFFFFFFFU);
/* Set the pre-scaler value */
  LL_TIM_SetPrescaler(TIM1, (uint16_t)0x0000);
  LL_TIM_GenerateEvent_UPDATE(TIM1);


  /* The configuration of counter mode is optional according to the type of instance.*/
  LL_TIM_SetCounterMode(TIM1, LL_TIM_COUNTERMODE_CENTER_UP);

  /* The configuration of clock division is optional .*/
  LL_TIM_SetClockDivision(TIM1, LL_TIM_CLOCKDIVISION_DIV1);

  /* The configuration of repetition counter is Optional according to the type of instance.*/
  LL_TIM_SetRepetitionCounter(TIM1, 0x00000000U);

HAL1

HAL2

Case of output compare configuration 

/* To fill the fields of the TIMx output channel there are two ways*/
LL_TIM_OC_InitTypeDef TIM_OC_InitStruct;

/*The first method*/
/* Set the default configuration */
LL_TIM_OC_StructInit(&TIM_OC_InitStruct);

 /*Or*/

/*The second method*/
/* Set the selected configuration */
TIM_OC_InitStruct->OCMode       = LL_TIM_OCMODE_FROZEN;
TIM_OC_InitStruct->OCState      = LL_TIM_OCSTATE_DISABLE;
TIM_OC_InitStruct->OCNState     = LL_TIM_OCSTATE_DISABLE;
TIM_OC_InitStruct->CompareValue = 0x00000000U;
TIM_OC_InitStruct->OCPolarity   = LL_TIM_OCPOLARITY_HIGH;
TIM_OC_InitStruct->OCNPolarity  = LL_TIM_OCPOLARITY_HIGH;
TIM_OC_InitStruct->OCIdleState  = LL_TIM_OCIDLESTATE_LOW;
TIM_OC_InitStruct->OCNIdleState = LL_TIM_OCIDLESTATE_LOW;

/* Configure the TIM1 channel1 output .*/
LL_TIM_OC_Init(TIM1, LL_TIM_CHANNEL_CH1, &TIM_OC_InitStruct);

/*  basic configuration.*/
LL_TIM_OC_SetMode(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_OCMODE_FROZEN);
LL_TIM_OC_SetPolarity(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_OCPOLARITY_HIGH);
LL_TIM_OC_SetCompareCH1(TIM1, 0x00000000U);

/*  If the instance supports the break function, there are additional configurations to do. */

LL_TIM_OC_SetIdleState(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_OCIDLESTATE_RESET);
LL_TIM_OC_SetIdleState(TIM1, LL_TIM_CHANNEL_CH1N, LL_TIM_OCIDLESTATE_RESET);
LL_TIM_OC_SetPolarity(TIM1, LL_TIM_CHANNEL_CH1N, LL_TIM_OCPOLARITY_HIGH);

Note

This configuration is valid for any channel just by changing the corresponding channel LL_TIM_CHANNEL_CHx.

HAL1

HAL2

Case of input capture configuration 

 /* To fill the fields of the TIMx input channel there are two ways*/
 LL_TIM_IC_InitTypeDef TIM_ICInitStruct;

 /*The first method*/
 /* Set the default configuration */
 LL_TIM_IC_StructInit(&TIM_ICInitStruct);

  /*Or*/

 /*The second method*/
 /* Set the selected configuration */
TIM_ICInitStruct->ICPolarity    = LL_TIM_IC_POLARITY_RISING;
TIM_ICInitStruct->ICActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
TIM_ICInitStruct->ICPrescaler   = LL_TIM_ICPSC_DIV1;
TIM_ICInitStruct->ICFilter      = LL_TIM_IC_FILTER_FDIV1;

 /* Configure the TIM1 channel1 input.*/
 LL_TIM_IC_Init(TIM1, LL_TIM_CHANNEL_CH1, &TIM_ICInitStruct);

/* Select the active input: IC1 = TI1FP1 */
LL_TIM_IC_SetActiveInput(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_ACTIVEINPUT_DIRECT);

/* Configure the input filter duration: no filter needed */
LL_TIM_IC_SetFilter(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_IC_FILTER_FDIV1);

/* Set input prescaler: prescaler is disabled */
LL_TIM_IC_SetPrescaler(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_ICPSC_DIV1);

/* Select the edge of the active transition on the TI1 channel: rising edge */
LL_TIM_IC_SetPolarity(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_IC_POLARITY_RISING);

/*set the CC1E Bit*/
LL_TIM_CC_EnableChannel(TIM1, LL_TIM_CHANNEL_CH1);

Note

This configuration is valid for any channel just by changing the corresponding channel LL_TIM_CHANNEL_CHx.

HAL1

HAL2

Case of encoder interface configuration 

/* To fill the fields of the TIMx encoder interface there are two ways*/
LL_TIM_ENCODER_InitTypeDef TIM_EncoderInitStruct;

/*The first method*/
/* Set the default configuration */
LL_TIM_ENCODER_StructInit(&TIM_EncoderInitStruct);

 /*Or*/

/*The second method*/
/* Set the selected configuration */
TIM_EncoderInitStruct->EncoderMode    = LL_TIM_ENCODERMODE_X2_TI1;
TIM_EncoderInitStruct->IC1Polarity    = LL_TIM_IC_POLARITY_RISING;
TIM_EncoderInitStruct->IC1ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
TIM_EncoderInitStruct->IC1Prescaler   = LL_TIM_ICPSC_DIV1;
TIM_EncoderInitStruct->IC1Filter      = LL_TIM_IC_FILTER_FDIV1;
TIM_EncoderInitStruct->IC2Polarity    = LL_TIM_IC_POLARITY_RISING;
TIM_EncoderInitStruct->IC2ActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
TIM_EncoderInitStruct->IC2Prescaler   = LL_TIM_ICPSC_DIV1;
TIM_EncoderInitStruct->IC2Filter      = LL_TIM_IC_FILTER_FDIV1;


/* Configure the encoder interface of the timer instance.*/
LL_TIM_ENCODER_Init(TIM1, &TIM_EncoderInitStruct);

/* Configure TI1 */
/* Select the active input: IC1 = TI1FP1 */
LL_TIM_IC_SetActiveInput(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_ACTIVEINPUT_DIRECT);

/* Configure the input filter duration: no filter needed */
LL_TIM_IC_SetFilter(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_IC_FILTER_FDIV1);

/* Unnecessary if the encoder mode is set to LL_TIM_CLK_ENCODER_X2_TI2 */
LL_TIM_IC_SetPrescaler(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_ICPSC_DIV1);

/* Select the edge of the active transition on the TI1 channel: rising edge */
LL_TIM_IC_SetPolarity(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_IC_POLARITY_RISING);

/*set the CC1E Bit*/
LL_TIM_CC_EnableChannel(TIM1, LL_TIM_CHANNEL_CH1);

/* Configure TI2 */
/* Select the active input: IC2 = TI2PF1 */
LL_TIM_IC_SetActiveInput(TIM1, LL_TIM_CHANNEL_CH2, LL_TIM_ACTIVEINPUT_DIRECT);

/* Configure the input filter duration: no filter needed */
LL_TIM_IC_SetFilter(TIM1, LL_TIM_CHANNEL_CH2LL_TIM_IC_FILTER_FDIV1);

/* Unnecessary if the encoder mode is set to LL_TIM_CLK_ENCODER_X2_TI1 */
LL_TIM_IC_SetPrescaler(TIM1, LL_TIM_CHANNEL_CH2 LL_TIM_ICPSC_DIV1);

/* Select the edge of the active transition on the TI2 channel: rising edge */
LL_TIM_IC_SetPolarity(TIM1, LL_TIM_CHANNEL_CH2 LL_TIM_IC_POLARITY_RISING);

/* Set encoder mode */
LL_TIM_SetClockSource(TIM1, LL_TIM_CLK_ENCODER_X2_TI1);

HAL1

HAL2

Case of hallsensor configuration 

/* To fill the fields of the TIMx Hall sensor  interface there are two ways*/
LL_TIM_HALLSENSOR_InitTypeDef TIM_HallSensorInitStruct;

/*The first method*/
/* Set the default configuration */
LL_TIM_HALLSENSOR_StructInit(&TIM_HallSensorInitStruct);

 /*Or*/

/*The second method*/
/* Set the selected configuration */
TIM_HallSensorInitStruct->IC1Polarity       = LL_TIM_IC_POLARITY_RISING;
TIM_HallSensorInitStruct->IC1Prescaler      = LL_TIM_ICPSC_DIV1;
TIM_HallSensorInitStruct->IC1Filter         = LL_TIM_IC_FILTER_FDIV1;
TIM_HallSensorInitStruct->CommutationDelay  = 0U;


/* Configure the Hall sensor interface of the timer instance.*/
LL_TIM_HALLSENSOR_Init(TIM1, &TIM_HallSensorInitStruct);

/* Connect TIMx_CH1, CH2 and CH3 pins to the TI1 input */
LL_TIM_IC_EnableXORCombination(TIM1);

/*  OC2REF signal is used as trigger output (TRGO)  */
LL_TIM_SetTriggerOutput(TIM1, LL_TIM_TRGO_OC2);

/* Configure the slave mode controller */
 LL_TIM_SetTriggerInput(TIM1, LL_TIM_TS_TI1F_ED);

 LL_TIM_SetSlaveMode(TIM1, LL_TIM_SLAVEMODE_RESET);

/* Configure TI1 */
/* Select the active input: IC1 = TI1FP1 */
LL_TIM_IC_SetActiveInput(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_ACTIVEINPUT_TRC);

/* Configure the input filter duration: no filter needed */
LL_TIM_IC_SetFilter(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_IC_FILTER_FDIV1);

/* Set input prescaler: prescaler is disabled */
LL_TIM_IC_SetPrescaler(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_ICPSC_DIV1);

/* Configure output channel 2 */
 LL_TIM_OC_SetMode(TIM1, LL_TIM_OCMODE_PWM2);

/* Select the edge of the active transition on the TI1 channel: rising edge */
LL_TIM_IC_SetPolarity(TIM1, LL_TIM_CHANNEL_CH1, LL_TIM_IC_POLARITY_RISING);

/*enable Channel 1 and Channel2*/
LL_TIM_CC_EnableChannel(TIM1, LL_TIM_CHANNEL_CH1);
LL_TIM_CC_EnableChannel(TIM1, LL_TIM_CHANNEL_CH2);

 /* Write to TIMx CCR2 */
LL_TIM_OC_SetCompareCH2(TIM1, CommutationDelay);

HAL1

HAL2

Case of break and deadtime configuration 

 /* To fill the fields of the Break and Dead Time configuration there are two ways*/
 LL_TIM_BDTR_InitTypeDef TIM_BDTRInitStruct;

 /*The first method*/
 /* Set the default configuration */
 LL_TIM_BDTR_StructInit(&TIM_BDTRInitStruct);

  /*Or*/

 /*The second method*/
 /* Set the selected configuration */
TIM_BDTRInitStruct->OSSRState       = LL_TIM_OSSR_DISABLE;
TIM_BDTRInitStruct->OSSIState       = LL_TIM_OSSI_DISABLE;
TIM_BDTRInitStruct->LockLevel       = LL_TIM_LOCKLEVEL_OFF;
TIM_BDTRInitStruct->DeadTime        = (uint8_t)0x00;
TIM_BDTRInitStruct->BreakState      = LL_TIM_BREAK_DISABLE;
TIM_BDTRInitStruct->BreakPolarity   = LL_TIM_BREAK_POLARITY_LOW;
TIM_BDTRInitStruct->BreakFilter     = LL_TIM_BREAK_FILTER_FDIV1;
TIM_BDTRInitStruct->BreakAFMode     = LL_TIM_BREAK_AFMODE_INPUT;
TIM_BDTRInitStruct->Break2State     = LL_TIM_BREAK2_DISABLE;
TIM_BDTRInitStruct->Break2Polarity  = LL_TIM_BREAK2_POLARITY_LOW;
TIM_BDTRInitStruct->Break2Filter    = LL_TIM_BREAK2_FILTER_FDIV1;
TIM_BDTRInitStruct->Break2AFMode    = LL_TIM_BREAK2_AFMODE_INPUT;
TIM_BDTRInitStruct->AutomaticOutput = LL_TIM_AUTOMATICOUTPUT_DISABLE;


 /* Configure the Break and Dead Time feature of the timer instance.*/
 LL_TIM_BDTR_Init(TIM1, &TIM_BDTRInitStruct);

/* Configure the Break and Dead Time feature of the timer instance.*/
LL_TIM_SetOffStates(TIM1, LL_TIM_OSSI_DISABLE | LL_TIM_OSSR_DISABLE);
LL_TIM_CC_SetLockLevel(TIM1, LL_TIM_LOCKLEVEL_OFF);
LL_TIM_OC_SetDeadTime(TIM1, 0x0000);
LL_TIM_EnableBRK(TIM1);
LL_TIM_ConfigBRK(TIM1, LL_TIM_BREAK_POLARITY_LOW | LL_TIM_BREAK_FILTER_FDIV1 | LL_TIM_BREAK_AFMODE_INPUT );
LL_TIM_EnableAutomaticOutput(TIM1);

/* This configuration is optional if the timer instance support 2 break inputs.*/
LL_TIM_EnableBRK2(TIM1);
LL_TIM_ConfigBRK2(TIM1, LL_TIM_BREAK2_POLARITY_LOW | LL_TIM_BREAK2_FILTER_FDIV1 | LL_TIM_BREAK2_AFMODE_INPUT );

Note

For any configuration, starting with the time base setup is essential. This step is crucial to ensure the system functions properly.

LL_TIM_DeInit() API Migration

According to the used TIM instance, implement the precise calls to LL_APB2_GRP1_ForceReset() and LL_APB2_GRP1_ReleaseReset().

Example: The application is using TIM1

Comparison of HAL1 and HAL2

HAL1

HAL2 

LL_TIM_DeInit(TIM1);

LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_TIM1); LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_TIM1);

Note

This function is valid for any instance TIMx